Parsa Rezaei
Parsa Rezaei at the bench, wearing magnifier loupes, assembling a quadcopter airframe
Available for new consulting engagements

Engineering for hardware that has to work outside the lab

Embedded & edge AI · UAV & robotics · Imaging & sensors · FPGA

I am a computer engineer working across embedded systems, autonomous vehicles, imaging and FPGA design. I take on the parts of a program that sit between disciplines, where the model meets the power budget, where the flight stack meets the airframe, where the sensor meets the test data, and get them working on real hardware.

What I do

What I work on

01

Agentic AI & Autonomy Tooling

Give a model real tools, and be deliberate about which ones.

Most AI projects stall in the same place: the model is fine, and nobody has decided what it is allowed to touch. I build the layer in between — typed tool and resource boundaries, usually over MCP — so an assistant can operate real systems without being handed something loaded. That runs through to putting models inside existing engineering workflows, and to the case where inference has to happen on the vehicle itself, inside a power and latency budget.

Details →
02

UAV & Robotics Systems

Airframe to autonomy, including the parts nobody wants to own.

Whole-vehicle work rather than one slice of it: structures, propulsion, avionics, telemetry and autonomous behavior, plus the fabrication to actually build the thing. I have taken vehicles from a requirement to a flying, tested prototype across electric, turbine and underwater propulsion.

Details →
03

Imaging & Sensor Systems

Characterize it, test it, and prove the numbers.

Image sensor and detector work: characterization, bench bring-up, and the data infrastructure that turns raw test output into a decision. This is my day-to-day professional practice rather than research work, and it covers the unglamorous middle of a sensor program where most schedule risk actually lives.

Details →
04

FPGA & Reconfigurable Computing

Custom logic where a CPU will not do.

FPGA design and hardware/software co-design for cases where timing, throughput or determinism rule out a general-purpose processor. Includes partial reconfiguration, where the fabric changes function at runtime rather than being fixed at build time.

Details →
Parsa Rezaei monogramAvailable for new consulting engagements

Bring me the part that will not behave.

Most of my work sits at a boundary: a model that has to fit a power budget, a flight stack that has to match an airframe, a sensor whose numbers have to survive production. Those handoffs are where schedules slip, and they are usually nobody specific's job.